Hytec Electronics Ltd 8424TR/UTM/G/17/2.0
Page 17
7. TRANSIENT RECORDER FUNCTION
The 8424 unit can be set to run as a Transient Recorder by setting the TR bit to one in the TR CSR.
In this mode the unit digitising for a set number of samples up to the maximum memory size. During this
time the unit monitors the upper and lower thresholds set by the user. If the thresholds are reached the
unit logs the address of the sample memory where it occurred. It also logs the peck value for all channels.
In this mode the module can be programmed to use either an external clock via the rear transition card or
to use the on internal sample clock. The 1MHz internal or the external clock can be gated to the rear
transition card (Clock Out) so that multiple modules can be connected to a single clock source.
Digitising commences (after programmed delay) from the rear transition ExtTrig signal or Software
trigger command and continues until stopped by a rear transition Stop In signal, software stop command,
memory overflow or after a set number of conversions as set by the Number of Conversions register. The
ADCs digitisation rates are software selectable and range from 1MHz down to 1Hz (set by the ADC
sample rate register Address 6hex).
The CSR register operates as detailed above but were the EX bit must be set to EX=1 for correct
Transient Recorder operation.
The Transient Recorder function adds the following registers:
7.1 Transient Recorder CSR (TR CSR)
Read/write Address: Byte hex 2Ahex (Word hex)
D15
D14
D13
D12
D11
D10
D09
D08
D07
D06
D05
D04
D03
D02
D01
D00
TR VT SOL
SIL ST SS CH1
CH0
TR When set to ‘1’ set the unit to run in Transient Recorder mode.
VT Voltage Trigger mode. When set to ‘1’ unit will acquire to memory when the selected
input (as set by CHx) is above its lower threshold point.
SOL Set Start Out TTL level high TTL when ‘0’ or Low TTL when ‘1’.
SIL Set Stop IN TTL level accept high TTL when ‘0’ or Low TTL when ‘1’.
ST Unit Stopped bit. Unit can be stopped by Software stop bit or external Stop bit.
SS Software Stop bit. This signal is ORed with the Stop IN signal line.
CHx Set which channel is used in VT
7.2 Post Trigger Sample or Number of Conversions Per-Trigger
This uses the Number of conversions register at address Chex - Ehex as detailed above. The number of
conversions register allows the number of conversions per trigger to be programmed.
If the Continues bit (Cont) is set in the Ext CSR and a number of triggers occur and the memory buffer
size of 256K is reached the conversions will wrap around from the top of the memory to the bottom of
the memory.
Manymanuals.com
Manymanuals.de
Manymanuals.fr
Manymanuals.it
Manymanuals.pl
Manymanuals.cz
Manymanuals.es
Manymanuals-pt.com
Comentarios a estos manuales