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Hytec Electronics Ltd 8424TR/UTM/G/16/2.0

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6.2 Set Number of Conversions

The number of conversions register (NCO) at address 2hex allows the number of samples per trigger to be

programmed. The maximum number of conversions is 128K of samples 1MB and 256K of samples for

2MB for each channel before the Conversion Complete (CC) flag is set in the CSR. An interrupt is

generated if the Enable Interrupt on Last Sample (EE) bit is set in the CSR. To clear the interrupt write a

‘0’ to the CC bit of the CSR.

If a number of triggers occur and the memory buffer size has reached its maximum number of conversions

per channel the conversions will wrap around from the top of the memory to the bottom of the memory.

6.3 Triggering

The triggering of the ADC8424 is only used when the number of conversions has been set in the Number

of Conversions register and the Enable Trigger (EX) bit has been set in the CSR.

6.3.1 Software Trigger

The unit can be triggered by a software trigger by writing a ‘1’ to the Software Trigger (ST) bit of the

CSR.

6.3.2 Hardware Trigger

The external trigger is passed to the ADC8424 via designated pins see Appendices B, C and D.

6.4 Memory Update

All ADC channels are updated simultaneously and the memory pointer incremented. Therefore the

memory pointer indicates what memory location has been reached by all the ADCs by adding the channel

number to the pointer value with the channel number as the most significant bit.

E.g:- Channel 1 = xxxx Channel 2 = 1xxxx Channel 3 = 2xxxx etc.

With 2Mb operation it is necessary to include the half full flag to see whether the pointer is addressing

lower or upper memory space.

E.g:- Channel 1 = xxxx Channel 2 = 1xxxx Channel 3 = 2xxxx when HF=0 for lower memory

Channel 1 = 8xxxx Channel 2 = 9xxxx Channel 3 = Axxxx when HF=1 for upper memory

6.5 Internal and External Clocking

This is selected by writing to bit 12 of the CSR to enable internal or external clocking of the sample rate.

The unit is calibrated using the internal 1MHz clock. At other internal sample clock frequencies the

calibration of the unit may vary by up to plus or minus a few milliamps. This effect is also present when

using the external clock but maybe up to few tens of milliamps.

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